HW#12 PnR for Apple C1 PLL and RISC Core CPU

  1. Build a model of Apple C1 ADPLL — 7.0 GHz (spec) with A* and NM Version, NM cross checked by MNA,  

2. Enhance the Apple C1 PLL model with DTC by building an Optimizer with MNA-powered trajectory. share, DTC-Solver

You may refer to schematic, architecture and timing, DTC-TDC Timing (share)

Apple C1 ADPLL — 7.0 GHz  (C1 is N4P)

Head-to-head

3. Macro Routing for a RISC core CPU

 baseline macro 32, metal layers 3, die 550 × 600 μm

add timing

add CTS

add std cells

add logistic prob of wins

Bit sliced macro 28, metal layers 9, die 690 × 750 μm

EX#12

1. 從影像資料庫選取 1 幅，製作3d 模型圖

2. Add engine animation of Leap 71 (Hint: prompt "Add engine animation")

3. Add navigation for the urban pedestrian (Hint: prompt "navigate")

4. 製作3d 障礙模型圖，模擬盲人行進 

The model is broken. The pedestrian got stuck ahead of the air-conditioner. Your task is repair the model to walk around it and make it to the destination.

Your prompts show a clear progression from initial obstacle identification → edge detection → 3D visualization → realistic models → collision detection → intelligent avoidance → critical safety zones.

• Try the vanilla version. No detection of obstacles. No avoidance.
• Try the detection only version.
• Try the shaky version with detection and avoidance 
• Make a comprehensive, functional version with detection and Voronoi-based avoidance

prompt share: ＡＩ障礙偵測，行進模擬

Grade EX#

   designated homework assignment EX#9

1. look up the matched homework assignment published within two weeks in 

https://minstral.blogspot.com/

2. grade in depth submitted to gmail within 2 weeks.
3. Do not include scores/marks.

4. Mark you are Claude TA. positive tone, bilingual, english first.
5. Compose reply. Output grading in plain text. do not send it out. keep in the draft box.

6. batch of five.
7 skip those graded