HW#12 PnR for Apple C1 PLL and RISC Core CPU

  1. Build a model of Apple C1 ADPLL — 7.0 GHz (spec) with A* and NM Version, NM cross checked by MNA,  

2. Enhance the Apple C1 PLL model with DTC by building an Optimizer with MNA-powered trajectory. share, DTC-Solver

You may refer to schematic, architecture and timing, DTC-TDC Timing (share)

Apple C1 ADPLL — 7.0 GHz  (C1 is N4P)

Head-to-head

3. Macro Routing for a RISC core CPU

 baseline macro 32, metal layers 3, die 550 × 600 μm

add timing

add CTS

add std cells

add logistic prob of wins

Bit sliced macro 28, metal layers 9, die 690 × 750 μm

EX#12

1. 從影像資料庫選取 1 幅，製作3d 模型圖

2. Add engine animation of Leap 71 (Hint: prompt "Add engine animation")

3. Add navigation for the urban pedestrian (Hint: prompt "navigate")

4. 製作3d 障礙模型圖，模擬盲人行進 

The model is broken. The pedestrian got stuck ahead of the air-conditioner. Your task is repair the model to walk around it and make it to the destination.

Your prompts show a clear progression from initial obstacle identification → edge detection → 3D visualization → realistic models → collision detection → intelligent avoidance → critical safety zones.

• Try the vanilla version. No detection of obstacles. No avoidance.
• Try the detection only version.
• Try the shaky version with detection and avoidance 
• Make a comprehensive, functional version with detection and Voronoi-based avoidance

prompt share: ＡＩ障礙偵測，行進模擬

Grade EX#

   designated homework assignment EX#9

1. look up the matched homework assignment published within two weeks in 

https://minstral.blogspot.com/

2. grade in depth submitted to gmail within 2 weeks.
3. Do not include scores/marks.

4. Mark you are Claude TA. positive tone, bilingual, english first.
5. Compose reply. Output grading in plain text. do not send it out. keep in the draft box.

6. batch of five.
7 skip those graded

Grade HW#

  designated homework assignment HW#9

1. look up the matched homework assignment published within two weeks in 

https://nptechsl.blogspot.com/

2. grade in depth submitted to gmail within 2 weeks.
3. Do not include scores/marks.

4. Mark you are Claude TA. positive tone, bilingual, english first.
5. Compose reply. Output grading in plain text. do not send it out. keep in the draft box.

6. batch of five.

7 grade most recent submissions which have not yet been graded by Claude TA
(skip those with most recent submission already graded by Claude TA. Do grade if the most recent submission only receives grading from Prof.)

EX#11

 課堂練習 

Deadline:  Saturday at 23:59 (one more week)

Send all the share links to  me chang212@gmail.com by email with subject EX#11 [your id, your name]

PCB Trace Routing and/or Parameter Tune-Up 

1. Optimize trace routing for the Differential Pair Circuit on PCB 

trace routing, share

Steps

Starting from the imperfect design, complete the trace routing. Do trace routing ( 參考 share, share 2, share 3)

2. 設計Crystal 石英振盪電路的PCB

 (slides)

3. 使用鑽孔路徑演算法進行以下PCB 鑽孔(演算法 提供參考)

PCB 1

PCB 2

HW#11 RF IC Placement & Routing

   Benchmark  Two-stage Cascode Class-AB RF power amplifier targeting 5G n78 (3.5 GHz) in TSMC 28nm RF

1. Experiment with 30 seeds

Measure success, congestion, wirelength, overlap pairs (before/after)

Placement style 1

Placement artifact style 2

benchmark

 

2. Benchmark the P&R for OP 741.

Experiment with 3 seeds

Measure success, congestion, wirelength, overlap pairs (before/after), Vin length match

Placer & Router for OP 741

benchmark

HW#10

  1. Benchmark the three designs of RF PA Drivers

2-stage RF PA driver 

Closed-form Optimizer with Load-Pull Contours 

Performance-first Thermal build  ∠Γ_3f₀ phase (deg) · open=0, -170 deg

Margin-first Thermal build ∠Γ_3f₀ phase (deg) · open=0, -170 deg

Using Cowork or Claude.ai, benchmark the three models. Experiment with 5 seeds. For each seed, optimize the circuit design using built-in A* and then NM. 

For each seed, record metrics from the cascaded optimizers: 

Compare Closed-Form vs. margin-first build vs. comprehensive model. 

-Tabulate Gain, Pout, PAE, OP1dB, S₁₁ (5 metrics × 10 seeds = 40 cells).

-Identify which metric the closed-form most over- or under-estimates.

Cross-check both thermal designs: compute junction temperature rise ΔT_j at peak Pout. Which design runs cooler? By how many °C?

-Build a 2×2 comparison table: rows = {Performance-first, Margin-first}, columns = {Fitness, min-spec-margin (dB), ΔT_j (°C), PAE @ 6dB back-off}.

Visualize all of your data

Supplemental

Margin vs. Performance builds

design choices 

Grade EX#2

 I cannot see any Bode plots in your sharing.

This is not the way to share artifacts in Claude.

check this out. How to publish a Claude artifact

a good example https://claude.ai/public/artifacts/afe5d364-02dc-44b6-b468-ba609db00883

  do not initiate a new mail for the same problem.

Prob 1.

Check out a more accurate version of Bode plot.

https://claude.ai/public/artifacts/afe5d364-02dc-44b6-b468-ba609db00883

Your ChatGPT is in the intuitive mode. Pls try to turn on the Thinking mode.

Thinking mode is critical for problems with complex constraints.

Why?

https://claude.ai/public/artifacts/d0d5aa01-589e-4bf2-a1c7-3978baacc1e9

https://claude.ai/public/artifacts/b61f3c7d-a53c-4ae8-9778-996b85978979

Grade EX#3 Chain of Thought

• 
  8 person- incorrect
  
  
  Suggestions: Turn on reasoning mode
• Sonnet 4.6 vs. Extended Version, Performance Comparison
• sample: Reasoning including failed attempts
• for animation, you may want to publish the artifact so that I can view it. Right now your share contains no animation because it is private to you.

• How to publish a Claude artifact

  
  

Unfortunately, 8 persons is not the right answer. Please rework your solution and support it with an animation showing each step of the process.

The answer (20 persons) is correct. That said, your solution is incomplete — not all erroneous intermediate steps were identified and shown as a chain of thought process.

Animation of thoughts, not just solution, 2

(包含問題分析、每個嘗試的死路、突破點、逐階段的約束驗證，以及最後的最優性證明和經驗總結。)

Analysis of strategies

Grade EX#7 Hypersurface and Optimization

in gmail, grade in depth EX#7. positive tone, bilingual, english first, mark graded by Claude Assistant, compose reply in the same thread rather than an independent mail, do not send, save in the draft box, wait for my confirmation 

general guidelines for grading

Scientific thinking——問對問題、察覺邏輯漏洞——這件事 AI 取代不了。

工具愈方便，這個能力就愈不能少。

check physical accuracy and correctness.

Pls put your final version of homework right here. Thanks.

do not initiate new email.

stop here.

Grade EX#8 LNA

 read assignment EX#8 at https://minstral.blogspot.com/2026/04/ex8-lna-low-noise-amplifier.html

grade in depth EX#8 submitted to gmail sat. Do not include scores/marks.
Mark you are Claude TA. positive tone, bilingual, english first. Compose reply. batch of five. Output grading in plain tex. do not send it out. keep in the draft box. 

Grade HW# 8 Benchmark with Claude Cowork

 read assignment HW#8 at https://nptechsl.blogspot.com/2026/04/hw8-claude-cowork.html

grade in depth HW#8 submitted to gmail within one week. Do not include scores/marks.
Mark you are Claude TA. positive tone, bilingual, english first. Compose reply. batch of five. Output grading in plain tex. do not send it out. keep in the draft box. 

HW#9

  課堂練習 

Deadline: This Saturday at 23:59

Send all the share links to  me chang212@gmail.com by email with subject HW#9 [your id, your name]

1. Benchmark the three algorithms (GD, NM, A*) and their cascades (one designed by you and the other design by AI )

• For the five methods, each runs with 10 seeds
• Tabulate Gain, Pout, PAE, OP1dB, S₁₁ (5 methods = 5 tables, each table with 5 metrics × 10 seeds = 40 cells).
• Visualize all of your data

Two-stage Cascode Class-AB RF PA Driver targeting 5G n78 (3.5 GHz) in TSMC 28nm RF

Build Sub 6 GHz Power Amplifier Optimizer with Die Synced

share, artifact (Closed-Form)

2. Benchmark the three designs of RF PA Drivers

2-stage RF PA driver 

Closed-form Optimizer with Load-Pull Contours 

Performance-first Thermal build  ∠Γ_3f₀ phase (deg) · open=0, -170 deg

Margin-first Thermal build ∠Γ_3f₀ phase (deg) · open=0, -170 deg

Using Cowork or Claude.ai, benchmark the three models. Experiment with 5 seeds. For each seed, optimize the circuit design using built-in A* and then NM. 

• For each seed, record metrics from the cascaded optimizers: 
• Compare Closed-Form vs. margin-first build vs. comprehensive model. 
• -Tabulate Gain, Pout, PAE, OP1dB, S₁₁ (5 metrics × 10 seeds = 40 cells).
• -Identify which metric the closed-form most over- or under-estimates.
• Cross-check both thermal designs: compute junction temperature rise ΔT_j at peak Pout. Which design runs cooler? By how many °C?
• -Build a 2×2 comparison table: rows = {Performance-first, Margin-first}, columns = {Fitness, min-spec-margin (dB), ΔT_j (°C), PAE @ 6dB back-off}.
• Visualize all of your data

Supplemental

Margin vs. Performance builds

design choices