HW#7 Analog IC Design

 

課堂練習 

Deadline: This Saturday at 23:59

Send all the share links to  me chang212@gmail.com by email with subject HW#6 [your id, your name]

任選1題

1  (a) A BJT Differential Pair IC Die  (share) is incorrectly designed. Fix the die. 

(b) Make a schematic

(c) Do parameter optimization via SA (simulated annealing)

(d) Placement & Routing for the die

For example you may use Quadratic Placement  & ILP+PathFinder+A* Routing

2. Design 2-stage diff pair (share from very simple diff pair)

(a)  Make a schematic,  

(b) Draw a  silicon die, considering Miller Compensation, 

(c) Do P&R (Placement & Routing) for the IC

See example of  P&R+opt compo